The present invention generally relates to multilayer printed circuit boards, and more particularly, to the structure of conductive isolation layers within the multilayer printed circuit boards.
Printed circuit boards are used in many types of electronic systems because they provide an efficient means to mount electrical components and to route signals between the components. The range of applications for printed circuit boards varies between low performance, low operating frequency applications to high performance, higher operating frequency applications.
At the higher operating frequencies, printed circuit boards can become more difficult and more expensive to design and manufacture. Interference effects between signal line traces on the same layers and between signal line traces on adjacent layers can become significant. High frequency signals can be reflected by variations in the impedance of the signal line traces which can degrade the quality of the signals being transmitted. Capacitive and inductive cross-coupling can occur between signal line traces which are routed in close proximity.
To improve the performance of the printed circuit boards, power and ground conductive isolation shield layers are often added between adjacent signal line layers on the printed circuit boards. Products targeted for divergent price/performance points incur additional design and manufacturing costs because the printed circuit boards are typically designed for each performance point. Additional costs are incurred as the products are periodically upgraded to incorporate newer components which have higher operating frequencies.
When a new product design is verified, the printed circuit boards used to verify the new product are often times not used for commercial production. When verifying the new designs, the printed circuit boards are typically designed to include a maximum number of power and ground planes to minimize the possibility of the printed circuit boards contributing to any product performance problems which may arise. Once the product is verified, additional costs are incurred when new printed circuit boards are designed and manufactured for the desired performance points.
It is a continuing goal of the electronics industry to reduce the cost of product development and manufacturing. Consequently, approaches which reduce printed circuit board design and development costs are desirable.
The present invention is a reconfigurable substrate which includes at least one signal line layer stack. Each signal line layer stack is defined to include two substantially parallel insulating layers and a signal line layer interposed between the two insulating layers and substantially parallel to the insulating layers. The substrate includes at least one conductive isolation layer adjacent to the at least one signal line layer stack and substantially parallel to the at least one signal line layer stack. The substrate is reconfigurable to different performance levels by adding or removing the at least one conductive isolation layer.